The subject matter discussed in the background section should not be assumed to be prior art merely as a result of its mention in the background section. Similarly, a problem mentioned in the background section or associated with the subject matter of the background section should not be assumed to have been previously recognized in the prior art. The subject matter in the background section merely represents different approaches, which in and of themselves may also correspond to embodiments of the claimed subject matter.
Modern microprocessors have various features engineered and implemented through their specific process of fabrication and manufacture attributable to the particular tape-out for that product. In electronics design, tape-out (also known as pattern generation) is the final result of the design process for integrated circuits before they are sent for manufacture. The tape-out is specifically the point at which the photomask of the circuit is sent to the fabrication facility.
As will be appreciated, not all features are always enabled on all units for any given base microprocessor tape-out. Each microprocessor is configured to match a particular product specification and feature set by having various features enabled and/or disabled based on physical tested characteristics, marketing requirements, price point, customer requested configuration, and so forth.
The resulting manufactured microprocessors having their various features enabled and/or disabled are then tracked for inventory purposes against a particular part number or configuration via a “SKU” or Stock Keeping Unit.
Today's industry and marketplace necessitates multiple such SKUs to be defined and tracked to satisfy customer demands and the manufacturer's business objectives.
Unfortunately, producing and tracking the multiple such product SKUs requires significant costs and overhead expenditures.
The present state of the art may therefore benefit from the means for implementing late fusing of processor features using a non-volatile memory as described herein.